International Journal of Innovative Research in Engineering and Management
Year: 2021, Volume: 8, Issue: 6
First page : ( 223) Last page : ( 226)
Online ISSN : 2350-0557.
DOI: 10.55524/ijirem.2021.8.6.44 |
DOI URL: https://doi.org/10.55524/ijirem.2021.8.6.44
This is an Open Access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0) (http://creativecommons.org/licenses/by/4.0)
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Pankaj Saraswat
Power electronics equipment and high-voltage systems have become increasingly common, introducing additional harmonics into the grid. Harmonic contamination must be reduced, and transmission performance must be improved, which necessitates power factor adjustment. A number of methods have been proposed for power factor adjustment. The technique of utilizing a Programmable Interface Circuit chip to build the power factor corrector of a 3-phase power system was described and planned in this article. Sensors and a programmable interface circuit detect and measure the load's power factor value. The information is moved to an algorithm, which subsequently triggers capacitors based on the algorithm's performance. The capacitor also turns on the lag and lead power factors, which are shown on an oscilloscope LCD panel. This will assist to compensate for voltage regulation and contributes to a power factor that is closer to unity, thus enhancing the performance of the power system.
SOEIT, Sanskriti University, Mathura, Uttar Pradesh, India (pankajsaraswat.cse@sanskriti.edu.in)
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